43 lines
1.1 KiB
Core
43 lines
1.1 KiB
Core
OS :: #import "OS$OS.core"
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Base :: #import "Base.core"
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ArenaDI: U64
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ADDITIONAL_COMMIT_SIZE :: 1024*1024
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DEFAULT_RESERVE_SIZE :: 1024*1024*1024
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DEFAULT_ALIGNMENT :: 8
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Arena :: struct
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di: U64 // @debug_id
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memory: OS.Memory
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alignment: U64
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len: U64
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Init :: (a: *Arena)
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a.memory = OS.Reserve(DEFAULT_RESERVE_SIZE)
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a.alignment = DEFAULT_ALIGNMENT
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a.di = ArenaDI++
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FromBuffer :: (buffer: []U8): Arena
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a: Arena
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a.memory.reserve = Len(buffer)->U64
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a.memory.commit = Len(buffer)->U64
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a.alignment = DEFAULT_ALIGNMENT
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a.di = ArenaDI++
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return a
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PushSize :: (a: *Arena, size: Base.SizeU): *void
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generous_size := size + a.alignment
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if a.len + generous_size > a.memory.commit
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if a.memory.reserve == 0
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Init(a)
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result := OS.Commit(&a.memory, generous_size + ADDITIONAL_COMMIT_SIZE)
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Assert(result == true)
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a.len = Base.AlignUp(a.len, a.alignment)
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Assert(a.memory.reserve > a.len + a.memory.commit)
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result: *void = a.memory.data + a.len
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a.len += size
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return result
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Release :: (a: *Arena)
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OS.Release(&a.memory)
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