Switching to register based VM

This commit is contained in:
Krzosa Karol
2022-06-21 13:05:11 +02:00
parent 101970f62e
commit a2b06d23d5
2 changed files with 404 additions and 446 deletions

View File

@@ -1,14 +1,29 @@
// REG - Register
// INS - Instruction
// //
// Instructions // Instructions
// //
enum{ enum Operation: U16{
INS_END, END_OF_INSTRUCTIONS,
INS_POP, POP_STACK,
PUSH_STACK,
LOAD_CONSTANT,
LOAD_FROM_MEMORY8,
LOAD_FROM_MEMORY16,
LOAD_FROM_MEMORY32,
LOAD_FROM_MEMORY64,
STORE_TO_MEMORY8,
STORE_TO_MEMORY16,
STORE_TO_MEMORY32,
STORE_TO_MEMORY64,
// //
// Generated using code_generating_script.py // Generated using code_generating_script.py
// //
INS_PUSH_S64,
INS_ADD_S64, INS_ADD_S64,
INS_SUB_S64, INS_SUB_S64,
INS_DIV_S64, INS_DIV_S64,
@@ -28,7 +43,6 @@ enum{
INS_GTE_S64, INS_GTE_S64,
INS_LTE_S64, INS_LTE_S64,
INS_PUSH_U64,
INS_ADD_U64, INS_ADD_U64,
INS_SUB_U64, INS_SUB_U64,
INS_DIV_U64, INS_DIV_U64,
@@ -48,7 +62,6 @@ enum{
INS_GTE_U64, INS_GTE_U64,
INS_LTE_U64, INS_LTE_U64,
INS_PUSH_F64,
INS_ADD_F64, INS_ADD_F64,
INS_SUB_F64, INS_SUB_F64,
INS_DIV_F64, INS_DIV_F64,
@@ -67,18 +80,54 @@ enum{
}; };
union Register{
F64 f64;
S64 s64;
U64 *pointer_u64;
U64 u64;
S64 *pointer_s64;
F64 *pointer_f64;
U64 *pointer64;
U8 *pointer;
};
enum{
REG_STACK_POINTER,
REG_INS_POINTER,
};
struct Instruction{
Operation operation;
U16 left;
union{U16 right; U16 src;};
U16 dst;
U64 di; // @debug_id
};
struct Instruction_Constant{
Operation operation;
U32 dst;
Register constant;
U64 di; // @debug_id
U64 debug_padding;
};
static_assert(sizeof(Instruction)*2 == sizeof(Instruction_Constant), "Should be double the size");
static_assert(sizeof(Instruction) % 8 == 0,"Should be 8 bit aligned");
static_assert(sizeof(Instruction_Constant) % 8 == 0,"Should be 8 bit aligned");
// //
// Bytecode interpreter context // Bytecode interpreter context
// //
struct Bc{ struct Bc{
U8 *ins_pointer; U64 dis; // @debug_id
U8 *stack_pointer;
U8 *stack_bottom; U8 *stack_bottom;
Register registers[256];
Arena instructions; Arena instructions;
Arena stack; Arena stack; // We reserve 4 gibs and allocate only 4 kibs to make sure we know when we
// accidently overshoot the stack by 2 gigabytes woo yeee
}; };
#define C(type, data) ((type *)data)[0] // Cast value to type and unpack the pointer so you can write to it
#include "bytecode_interpreter_generated.cpp"
function Bc function Bc
create_bytecode_interp(){ create_bytecode_interp(){
@@ -90,7 +139,7 @@ create_bytecode_interp(){
// Commit // Commit
arena_push_size(&b.instructions, 16); arena_push_size(&b.instructions, 16);
arena_clear(&b.instructions); arena_clear(&b.instructions);
b.ins_pointer = b.instructions.memory.data; b.registers[REG_INS_POINTER].pointer = b.instructions.memory.data;
} }
{ {
@@ -99,434 +148,410 @@ create_bytecode_interp(){
// Setup a 4 kilobyte stack // Setup a 4 kilobyte stack
arena_push_size(&b.stack, kib(4)); arena_push_size(&b.stack, kib(4));
b.stack_pointer = b.stack_bottom = b.stack.memory.data; b.registers[REG_STACK_POINTER].pointer = b.stack_bottom = b.stack.memory.data;
} }
return b; return b;
} }
force_inline void function void
emit_pop(Bc *bc){ emit_load_constant_f64(Bc *b, U8 dst, F64 constant){
U8 *instruction = (U8 *)arena_push_size(&bc->instructions, sizeof(U8)); auto i = exp_alloc_type(&b->instructions, Instruction_Constant);
*instruction = INS_POP; i->di = b->dis++;
i->operation = LOAD_CONSTANT;
i->constant.f64 = constant;
i->dst = dst;
} }
force_inline void function void
emit_end(Bc *bc){ emit_load_constant_s64(Bc *b, U8 dst, S64 constant){
U8 *instruction = (U8 *)arena_push_size(&bc->instructions, sizeof(U8)); auto i = exp_alloc_type(&b->instructions, Instruction_Constant);
*instruction = INS_END; i->di = b->dis++;
i->operation = LOAD_CONSTANT;
i->constant.s64 = constant;
i->dst = dst;
} }
#define ins_pop_t(b, T) (*((T *)ins_pop(b))) function void
force_inline void * emit_load_constant_u64(Bc *b, U8 dst, U64 constant){
ins_pop(Bc *b){ auto i = exp_alloc_type(&b->instructions, Instruction_Constant);
assert_msg(b->stack_pointer != b->stack_bottom, "Reached bottom of bytecode interpreter stack"); i->di = b->dis++;
b->stack_pointer -= sizeof(U64); i->operation = LOAD_CONSTANT;
// @warning we don't do anything with type for now i->constant.u64 = constant;
Ast_Type_Kind *type = (Ast_Type_Kind *)b->stack_pointer; i->dst = dst;
unused(type); }
b->stack_pointer -= sizeof(U64);
return b->stack_pointer; function void
emit_push(Bc *b, U8 src){
Instruction *i = exp_alloc_type(&b->instructions, Instruction);
i->di = b->dis++;
i->operation = PUSH_STACK;
i->src = src;
}
function void
emit_pop(Bc *b, U8 dst){
Instruction *i = exp_alloc_type(&b->instructions, Instruction);
i->di = b->dis++;
i->operation = POP_STACK;
i->dst = dst;
}
function void
emit_memory(Bc *b, Operation ins, U8 dst, U8 src){
Instruction *i = exp_alloc_type(&b->instructions, Instruction);
i->di = b->dis++;
i->operation = ins;
i->dst = dst;
i->src = src;
}
function void
emit_arithmetic(Bc *b, Operation ins, U8 left, U8 right, U8 dst){
Instruction *i = exp_alloc_type(&b->instructions, Instruction);
i->di = b->dis++;
i->operation = ins;
i->left = left;
i->right = right;
i->dst = dst;
}
function void
emit_end(Bc *b){
Instruction *i = exp_alloc_type(&b->instructions, Instruction);
i->di = b->dis++;
i->operation = END_OF_INSTRUCTIONS;
} }
function void function void
run_bytecode_interp(Bc *b){ run_bytecode_interp(Bc *b){
for(;;){ for(;;){
U8 instruction = *b->ins_pointer++; auto instr = (Instruction *)b->registers[REG_INS_POINTER].pointer64;
switch(instruction){ b->registers[REG_INS_POINTER].pointer += sizeof(Instruction);
switch(instr->operation){
case LOAD_FROM_MEMORY64:{
U64 *load_address = b->registers[instr->src].pointer64;
b->registers[instr->dst].u64 = *load_address;
}break;
case STORE_TO_MEMORY64:{
U64 *store_address = b->registers[instr->dst].pointer64;
*store_address = b->registers[instr->src].u64;
}break;
case PUSH_STACK:{
U64 *stack = b->registers[REG_STACK_POINTER].pointer64;
U64 src = b->registers[instr->src].u64;
*stack++ = src;
}break;
case POP_STACK:{
U64 *stack = --b->registers[REG_STACK_POINTER].pointer64;
b->registers[instr->dst].u64 = *stack;
}break;
case INS_POP:{ case END_OF_INSTRUCTIONS:{
void *value = ins_pop(b); goto end_of_program;
S64 *s64 = (S64 *)value; }break;
F64 *f64 = (F64 *)value;
U64 *u64 = (U64 *)value;
unused(s64);
unused(f64);
unused(u64);
} break;
case INS_END:{
goto interp_loop_breakout;
} break;
case LOAD_CONSTANT: {
b->registers[REG_INS_POINTER].pointer+=sizeof(Instruction); // Constant is twice the size of regular
auto i = (Instruction_Constant *)instr;
b->registers[i->dst] = i->constant;
}break;
// //
// Generated using code_generating_script.py // Generated using code_generating_script.py
// //
case INS_PUSH_S64:{ case INS_ADD_S64:{
// Fetch value from the instruction. S64 left = b->registers[instr->left].s64;
// instructions are tightly packed so we S64 right = b->registers[instr->right].s64;
// move pointer by the type size b->registers[instr->dst].s64 = left + right; break;
auto value = (S64 *)b->ins_pointer; }break;
b->ins_pointer += sizeof(S64);
ins_push_s64(b, *value);
} break;
case INS_ADD_S64:{ case INS_SUB_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l + r; b->registers[instr->dst].s64 = left - right; break;
ins_push_s64(b, result); }break;
}break;
case INS_SUB_S64:{ case INS_DIV_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l - r; b->registers[instr->dst].s64 = left / right; break;
ins_push_s64(b, result); }break;
}break;
case INS_DIV_S64:{ case INS_MUL_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l / r; b->registers[instr->dst].s64 = left * right; break;
ins_push_s64(b, result); }break;
}break;
case INS_MUL_S64:{ case INS_MOD_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l * r; b->registers[instr->dst].s64 = left % right; break;
ins_push_s64(b, result); }break;
}break;
case INS_MOD_S64:{ case INS_SHR_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l % r; b->registers[instr->dst].s64 = left >> right; break;
ins_push_s64(b, result); }break;
}break;
case INS_SHR_S64:{ case INS_SHL_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l >> r; b->registers[instr->dst].s64 = left << right; break;
ins_push_s64(b, result); }break;
}break;
case INS_SHL_S64:{ case INS_BITAND_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l << r; b->registers[instr->dst].s64 = left & right; break;
ins_push_s64(b, result); }break;
}break;
case INS_BITAND_S64:{ case INS_BITOR_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l & r; b->registers[instr->dst].s64 = left | right; break;
ins_push_s64(b, result); }break;
}break;
case INS_BITOR_S64:{ case INS_BITXOR_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l | r; b->registers[instr->dst].s64 = left ^ right; break;
ins_push_s64(b, result); }break;
}break;
case INS_BITXOR_S64:{ case INS_BITNOT_S64:{
S64 l = ins_pop_t(b, S64); S64 left = (S64)b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 *dst = b->registers[instr->dst].pointer_s64;
S64 result = l | r; *dst = ~left;
ins_push_s64(b, result); }break;
}break;
case INS_BITNOT_S64:{ case INS_EQ_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 result = ~l; S64 right = b->registers[instr->right].s64;
ins_push_s64(b, result); b->registers[instr->dst].s64 = left == right; break;
}break; }break;
case INS_EQ_S64:{ case INS_NEQ_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l == r; b->registers[instr->dst].s64 = left != right; break;
ins_push_s64(b, result); }break;
}break;
case INS_NEQ_S64:{ case INS_GT_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l != r; b->registers[instr->dst].s64 = left > right; break;
ins_push_s64(b, result); }break;
}break;
case INS_GT_S64:{ case INS_LT_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l > r; b->registers[instr->dst].s64 = left < right; break;
ins_push_s64(b, result); }break;
}break;
case INS_LT_S64:{ case INS_OR_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l < r; b->registers[instr->dst].s64 = left || right; break;
ins_push_s64(b, result); }break;
}break;
case INS_OR_S64:{ case INS_GTE_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l || r; b->registers[instr->dst].s64 = left >= right; break;
ins_push_s64(b, result); }break;
}break;
case INS_GTE_S64:{ case INS_LTE_S64:{
S64 l = ins_pop_t(b, S64); S64 left = b->registers[instr->left].s64;
S64 r = ins_pop_t(b, S64); S64 right = b->registers[instr->right].s64;
S64 result = l >= r; b->registers[instr->dst].s64 = left <= right; break;
ins_push_s64(b, result); }break;
}break;
case INS_LTE_S64:{ case INS_ADD_U64:{
S64 l = ins_pop_t(b, S64); U64 left = b->registers[instr->left].u64;
S64 r = ins_pop_t(b, S64); U64 right = b->registers[instr->right].u64;
S64 result = l <= r; b->registers[instr->dst].u64 = left + right; break;
ins_push_s64(b, result); }break;
}break;
case INS_PUSH_U64:{ case INS_SUB_U64:{
// Fetch value from the instruction. U64 left = b->registers[instr->left].u64;
// instructions are tightly packed so we U64 right = b->registers[instr->right].u64;
// move pointer by the type size b->registers[instr->dst].u64 = left - right; break;
auto value = (U64 *)b->ins_pointer; }break;
b->ins_pointer += sizeof(U64);
ins_push_u64(b, *value);
} break;
case INS_ADD_U64:{ case INS_DIV_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l + r; b->registers[instr->dst].u64 = left / right; break;
ins_push_u64(b, result); }break;
}break;
case INS_SUB_U64:{ case INS_MUL_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l - r; b->registers[instr->dst].u64 = left * right; break;
ins_push_u64(b, result); }break;
}break;
case INS_DIV_U64:{ case INS_MOD_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l / r; b->registers[instr->dst].u64 = left % right; break;
ins_push_u64(b, result); }break;
}break;
case INS_MUL_U64:{ case INS_SHR_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l * r; b->registers[instr->dst].u64 = left >> right; break;
ins_push_u64(b, result); }break;
}break;
case INS_MOD_U64:{ case INS_SHL_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l % r; b->registers[instr->dst].u64 = left << right; break;
ins_push_u64(b, result); }break;
}break;
case INS_SHR_U64:{ case INS_BITAND_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l >> r; b->registers[instr->dst].u64 = left & right; break;
ins_push_u64(b, result); }break;
}break;
case INS_SHL_U64:{ case INS_BITOR_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l << r; b->registers[instr->dst].u64 = left | right; break;
ins_push_u64(b, result); }break;
}break;
case INS_BITAND_U64:{ case INS_BITXOR_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l & r; b->registers[instr->dst].u64 = left ^ right; break;
ins_push_u64(b, result); }break;
}break;
case INS_BITOR_U64:{ case INS_BITNOT_U64:{
U64 l = ins_pop_t(b, U64); U64 left = (U64)b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 *dst = b->registers[instr->dst].pointer_u64;
U64 result = l | r; *dst = ~left;
ins_push_u64(b, result); }break;
}break;
case INS_BITXOR_U64:{ case INS_EQ_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l | r; b->registers[instr->dst].u64 = left == right; break;
ins_push_u64(b, result); }break;
}break;
case INS_BITNOT_U64:{ case INS_NEQ_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 result = ~l; U64 right = b->registers[instr->right].u64;
ins_push_u64(b, result); b->registers[instr->dst].u64 = left != right; break;
}break; }break;
case INS_EQ_U64:{ case INS_GT_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l == r; b->registers[instr->dst].u64 = left > right; break;
ins_push_u64(b, result); }break;
}break;
case INS_NEQ_U64:{ case INS_LT_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l != r; b->registers[instr->dst].u64 = left < right; break;
ins_push_u64(b, result); }break;
}break;
case INS_GT_U64:{ case INS_OR_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l > r; b->registers[instr->dst].u64 = left || right; break;
ins_push_u64(b, result); }break;
}break;
case INS_LT_U64:{ case INS_GTE_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l < r; b->registers[instr->dst].u64 = left >= right; break;
ins_push_u64(b, result); }break;
}break;
case INS_OR_U64:{ case INS_LTE_U64:{
U64 l = ins_pop_t(b, U64); U64 left = b->registers[instr->left].u64;
U64 r = ins_pop_t(b, U64); U64 right = b->registers[instr->right].u64;
U64 result = l || r; b->registers[instr->dst].u64 = left <= right; break;
ins_push_u64(b, result); }break;
}break;
case INS_GTE_U64:{ case INS_ADD_F64:{
U64 l = ins_pop_t(b, U64); F64 left = b->registers[instr->left].f64;
U64 r = ins_pop_t(b, U64); F64 right = b->registers[instr->right].f64;
U64 result = l >= r; b->registers[instr->dst].f64 = left + right; break;
ins_push_u64(b, result); }break;
}break;
case INS_LTE_U64:{ case INS_SUB_F64:{
U64 l = ins_pop_t(b, U64); F64 left = b->registers[instr->left].f64;
U64 r = ins_pop_t(b, U64); F64 right = b->registers[instr->right].f64;
U64 result = l <= r; b->registers[instr->dst].f64 = left - right; break;
ins_push_u64(b, result); }break;
}break;
case INS_PUSH_F64:{ case INS_DIV_F64:{
// Fetch value from the instruction. F64 left = b->registers[instr->left].f64;
// instructions are tightly packed so we F64 right = b->registers[instr->right].f64;
// move pointer by the type size b->registers[instr->dst].f64 = left / right; break;
auto value = (F64 *)b->ins_pointer; }break;
b->ins_pointer += sizeof(F64);
ins_push_f64(b, *value);
} break;
case INS_ADD_F64:{ case INS_MUL_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l + r; b->registers[instr->dst].f64 = left * right; break;
ins_push_f64(b, result); }break;
}break;
case INS_SUB_F64:{ case INS_EQ_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l - r; b->registers[instr->dst].f64 = left == right; break;
ins_push_f64(b, result); }break;
}break;
case INS_DIV_F64:{ case INS_NEQ_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l / r; b->registers[instr->dst].f64 = left != right; break;
ins_push_f64(b, result); }break;
}break;
case INS_MUL_F64:{ case INS_GT_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l * r; b->registers[instr->dst].f64 = left > right; break;
ins_push_f64(b, result); }break;
}break;
case INS_EQ_F64:{ case INS_LT_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l == r; b->registers[instr->dst].f64 = left < right; break;
ins_push_f64(b, result); }break;
}break;
case INS_NEQ_F64:{ case INS_GTE_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l != r; b->registers[instr->dst].f64 = left >= right; break;
ins_push_f64(b, result); }break;
}break;
case INS_GT_F64:{ case INS_LTE_F64:{
F64 l = ins_pop_t(b, F64); F64 left = b->registers[instr->left].f64;
F64 r = ins_pop_t(b, F64); F64 right = b->registers[instr->right].f64;
F64 result = l > r; b->registers[instr->dst].f64 = left <= right; break;
ins_push_f64(b, result); }break;
}break;
case INS_LT_F64:{
F64 l = ins_pop_t(b, F64);
F64 r = ins_pop_t(b, F64);
F64 result = l < r;
ins_push_f64(b, result);
}break;
case INS_GTE_F64:{
F64 l = ins_pop_t(b, F64);
F64 r = ins_pop_t(b, F64);
F64 result = l >= r;
ins_push_f64(b, result);
}break;
case INS_LTE_F64:{
F64 l = ins_pop_t(b, F64);
F64 r = ins_pop_t(b, F64);
F64 result = l <= r;
ins_push_f64(b, result);
}break;
// //
// **End** of generated using code_generating_script.py // **End** of generated using code_generating_script.py
// //
default: invalid_codepath;
} }
} }
interp_loop_breakout:; end_of_program:;
} }
function void function void
test_interpreter(){ test_interpreter(){
Bc b = create_bytecode_interp(); Bc b = create_bytecode_interp();
emit_load_constant_f64(&b, 2, 100.32);
emit_push_f64(&b, 64); emit_load_constant_f64(&b, 3, 200.68);
emit_push_f64(&b, 32); emit_arithmetic(&b, INS_ADD_F64, 2, 3, 4);
emit_neq_f64(&b);
emit_pop(&b);
emit_push_f64(&b, 64);
emit_push_f64(&b, 32);
emit_add_f64(&b);
emit_pop(&b);
emit_end(&b); emit_end(&b);
run_bytecode_interp(&b); run_bytecode_interp(&b);
} }

View File

@@ -7,11 +7,10 @@ result = """
types = ["S64", "U64", "F64"] types = ["S64", "U64", "F64"]
operations = [ operations = [
["+", "ADD"], ["-", "SUB"], ["/", "DIV"], ["*", "MUL"], ["%", "MOD"], ["+", "ADD"], ["-", "SUB"], ["/", "DIV"], ["*", "MUL"], ["%", "MOD"],
[">>", "SHR"], ["<<", "SHL"], ["&", "BITAND"], ["|", "BITOR"], ["|", "BITXOR"], [">>", "SHR"], ["<<", "SHL"], ["&", "BITAND"], ["|", "BITOR"], ["^", "BITXOR"],
["~", "BITNOT"], ["==", "EQ"], ["!=", "NEQ"], [">", "GT"], ["<", "LT"], ["||", "OR"], ["~", "BITNOT"], ["==", "EQ"], ["!=", "NEQ"], [">", "GT"], ["<", "LT"], ["||", "OR"],
[">=", "GTE"], ["<=", "LTE"] [">=", "GTE"], ["<=", "LTE"]
] ]
enum = ["PUSH"]
def should_skip(T, op): def should_skip(T, op):
if T == "F64": if T == "F64":
@@ -19,110 +18,44 @@ def should_skip(T, op):
and op != "GT" and op != "LT" and op != "GTE" and op != "LTE": and op != "GT" and op != "LT" and op != "GTE" and op != "LTE":
return True return True
# #
# Generate enum # Generate enum
# #
if True: if False:
for T in types: for T in types:
for op in enum:
result += f" INS_{op}_{T},\n"
for _, op in operations: for _, op in operations:
if should_skip(T, op): if should_skip(T, op):
continue continue
result += f" INS_{op}_{T},\n" result += f" INS_{op}_{T},\n"
result += "\n" result += "\n"
#
# Generate utility functions
#
if False:
for T in types:
t = T.lower()
result += f"""
force_inline void
ins_push_{t}(Bc *b, {T} value){{
auto data = b->stack_pointer;
b->stack_pointer += 2*sizeof(U64);
C({T}, data) = value;
data += sizeof(U64);
C(U64, data) = TYPE_{T};
}}
force_inline void
emit_push_{t}(Bc *bc, {T} emit_value){{
U8 *instruction = (U8 *)arena_push_size(&bc->instructions, sizeof(U8)+sizeof({T}));
*instruction = INS_PUSH_{T};
{T} *value = ({T} *)(instruction + 1);
*value = emit_value;
}}
"""
for symbol, OP in operations:
if should_skip(T, OP):
continue
op = OP.lower()
result += f"""
force_inline void
emit_{op}_{t}(Bc *bc){{
U8 *instruction = (U8 *)arena_push_size(&bc->instructions, sizeof(U8));
*instruction = INS_{OP}_{T};
}}
"""
# #
# Generate switch cases # Generate switch cases
# #
if False: if True:
for T in types: for T in types:
t = T.lower() t = T.lower()
#
# Push operation for type
#
result += f"""
case INS_PUSH_{T}:{{
// Fetch value from the instruction.
// instructions are tightly packed so we
// move pointer by the type size
auto value = ({T} *)b->ins_pointer;
b->ins_pointer += sizeof({T});
ins_push_{t}(b, *value);
}} break;
"""
for symbol, op_name in operations: for symbol, op_name in operations:
if should_skip(T, op_name): if should_skip(T, op_name):
continue continue
#
# Unary operator special case # Unary operator special case
#
if symbol == "~": if symbol == "~":
result += f""" result += f"""
case INS_{op_name}_{T}:{{ case INS_{op_name}_{T}:{{
{T} l = ins_pop_t(b, {T}); {T} left = ({T})b->registers[instr->left].{t};
{T} result = {symbol}l; {T} *dst = b->registers[instr->dst].pointer_{t};
ins_push_{t}(b, result); *dst = {symbol}left;
}}break; }}break;
""" """
continue continue
#
# Binary operation # Binary operation
#
result += f""" result += f"""
case INS_{op_name}_{T}:{{ case INS_{op_name}_{T}:{{
{T} l = ins_pop_t(b, {T}); {T} left = b->registers[instr->left].{t};
{T} r = ins_pop_t(b, {T}); {T} right = b->registers[instr->right].{t};
{T} result = l {symbol} r; b->registers[instr->dst].{t} = left {symbol} right; break;
ins_push_{t}(b, result); }}break;
}}break;
""" """