diff --git a/bytecode_interpreter.cpp b/bytecode_interpreter.cpp index 1eb13b4..ad46f21 100644 --- a/bytecode_interpreter.cpp +++ b/bytecode_interpreter.cpp @@ -1,85 +1,137 @@ // REG - Register // INS - Instruction -// -// Instructions -// -enum Operation: U16{ - END_OF_INSTRUCTIONS, - POP_STACK, - PUSH_STACK, - - LOAD_CONSTANT, - - LOAD_FROM_MEMORY8, - LOAD_FROM_MEMORY16, - LOAD_FROM_MEMORY32, - LOAD_FROM_MEMORY64, - - STORE_TO_MEMORY8, - STORE_TO_MEMORY16, - STORE_TO_MEMORY32, - STORE_TO_MEMORY64, - // // Generated using code_generating_script.py // - INS_ADD_S64, - INS_SUB_S64, - INS_DIV_S64, - INS_MUL_S64, - INS_MOD_S64, - INS_SHR_S64, - INS_SHL_S64, - INS_BITAND_S64, - INS_BITOR_S64, - INS_BITXOR_S64, - INS_BITNOT_S64, - INS_EQ_S64, - INS_NEQ_S64, - INS_GT_S64, - INS_LT_S64, - INS_OR_S64, - INS_GTE_S64, - INS_LTE_S64, - INS_ADD_U64, - INS_SUB_U64, - INS_DIV_U64, - INS_MUL_U64, - INS_MOD_U64, - INS_SHR_U64, - INS_SHL_U64, - INS_BITAND_U64, - INS_BITOR_U64, - INS_BITXOR_U64, - INS_BITNOT_U64, - INS_EQ_U64, - INS_NEQ_U64, - INS_GT_U64, - INS_LT_U64, - INS_OR_U64, - INS_GTE_U64, - INS_LTE_U64, - INS_ADD_F64, - INS_SUB_F64, - INS_DIV_F64, - INS_MUL_F64, - INS_EQ_F64, - INS_NEQ_F64, - INS_GT_F64, - INS_LT_F64, - INS_GTE_F64, - INS_LTE_F64, +enum Operation: U16{ + BC_END_OF_INSTRUCTIONS, + BC_POP_STACK, + BC_PUSH_STACK, + BC_LOAD_CONSTANT, + BC_LOAD_FROM_MEMORY64, + BC_LOAD_FROM_MEMORY32, + BC_LOAD_FROM_MEMORY16, + BC_LOAD_FROM_MEMORY8, + BC_STORE_TO_MEMORY64, + BC_STORE_TO_MEMORY32, + BC_STORE_TO_MEMORY16, + BC_STORE_TO_MEMORY8, + BC_ADD_S64, + BC_SUB_S64, + BC_DIV_S64, + BC_MUL_S64, + BC_MOD_S64, + BC_SHR_S64, + BC_SHL_S64, + BC_BITAND_S64, + BC_BITOR_S64, + BC_BITXOR_S64, + BC_BITNOT_S64, + BC_EQ_S64, + BC_NEQ_S64, + BC_GT_S64, + BC_LT_S64, + BC_OR_S64, + BC_GTE_S64, + BC_LTE_S64, + BC_ADD_U64, + BC_SUB_U64, + BC_DIV_U64, + BC_MUL_U64, + BC_MOD_U64, + BC_SHR_U64, + BC_SHL_U64, + BC_BITAND_U64, + BC_BITOR_U64, + BC_BITXOR_U64, + BC_BITNOT_U64, + BC_EQ_U64, + BC_NEQ_U64, + BC_GT_U64, + BC_LT_U64, + BC_OR_U64, + BC_GTE_U64, + BC_LTE_U64, + BC_ADD_F64, + BC_SUB_F64, + BC_DIV_F64, + BC_MUL_F64, + BC_EQ_F64, + BC_NEQ_F64, + BC_GT_F64, + BC_LT_F64, + BC_GTE_F64, + BC_LTE_F64, +}; +const char *op_name[] = { + "BC_END_OF_INSTRUCTIONS", + "BC_POP_STACK", + "BC_PUSH_STACK", + "BC_LOAD_CONSTANT", + "BC_LOAD_FROM_MEMORY64", + "BC_LOAD_FROM_MEMORY32", + "BC_LOAD_FROM_MEMORY16", + "BC_LOAD_FROM_MEMORY8", + "BC_STORE_TO_MEMORY64", + "BC_STORE_TO_MEMORY32", + "BC_STORE_TO_MEMORY16", + "BC_STORE_TO_MEMORY8", + "BC_ADD_S64", + "BC_SUB_S64", + "BC_DIV_S64", + "BC_MUL_S64", + "BC_MOD_S64", + "BC_SHR_S64", + "BC_SHL_S64", + "BC_BITAND_S64", + "BC_BITOR_S64", + "BC_BITXOR_S64", + "BC_BITNOT_S64", + "BC_EQ_S64", + "BC_NEQ_S64", + "BC_GT_S64", + "BC_LT_S64", + "BC_OR_S64", + "BC_GTE_S64", + "BC_LTE_S64", + "BC_ADD_U64", + "BC_SUB_U64", + "BC_DIV_U64", + "BC_MUL_U64", + "BC_MOD_U64", + "BC_SHR_U64", + "BC_SHL_U64", + "BC_BITAND_U64", + "BC_BITOR_U64", + "BC_BITXOR_U64", + "BC_BITNOT_U64", + "BC_EQ_U64", + "BC_NEQ_U64", + "BC_GT_U64", + "BC_LT_U64", + "BC_OR_U64", + "BC_GTE_U64", + "BC_LTE_U64", + "BC_ADD_F64", + "BC_SUB_F64", + "BC_DIV_F64", + "BC_MUL_F64", + "BC_EQ_F64", + "BC_NEQ_F64", + "BC_GT_F64", + "BC_LT_F64", + "BC_GTE_F64", + "BC_LTE_F64", +}; // // **End** of generated using code_generating_script.py // -}; - union Register{ F64 f64; S64 s64; @@ -111,7 +163,7 @@ struct Instruction_Constant{ Register constant; U64 di; // @debug_id - U64 debug_padding; + U64 debug_type_flag; }; static_assert(sizeof(Instruction)*2 == sizeof(Instruction_Constant), "Should be double the size"); @@ -158,34 +210,37 @@ function void emit_load_constant_f64(Bc *b, U8 dst, F64 constant){ auto i = exp_alloc_type(&b->instructions, Instruction_Constant); i->di = b->dis++; - i->operation = LOAD_CONSTANT; + i->operation = BC_LOAD_CONSTANT; i->constant.f64 = constant; i->dst = dst; + i->debug_type_flag = TYPE_F64; } function void emit_load_constant_s64(Bc *b, U8 dst, S64 constant){ auto i = exp_alloc_type(&b->instructions, Instruction_Constant); i->di = b->dis++; - i->operation = LOAD_CONSTANT; + i->operation = BC_LOAD_CONSTANT; i->constant.s64 = constant; i->dst = dst; + i->debug_type_flag = TYPE_S64; } function void emit_load_constant_u64(Bc *b, U8 dst, U64 constant){ auto i = exp_alloc_type(&b->instructions, Instruction_Constant); i->di = b->dis++; - i->operation = LOAD_CONSTANT; + i->operation = BC_LOAD_CONSTANT; i->constant.u64 = constant; i->dst = dst; + i->debug_type_flag = TYPE_U64; } function void emit_push(Bc *b, U8 src){ Instruction *i = exp_alloc_type(&b->instructions, Instruction); i->di = b->dis++; - i->operation = PUSH_STACK; + i->operation = BC_PUSH_STACK; i->src = src; } @@ -193,7 +248,7 @@ function void emit_pop(Bc *b, U8 dst){ Instruction *i = exp_alloc_type(&b->instructions, Instruction); i->di = b->dis++; - i->operation = POP_STACK; + i->operation = BC_POP_STACK; i->dst = dst; } @@ -220,320 +275,380 @@ function void emit_end(Bc *b){ Instruction *i = exp_alloc_type(&b->instructions, Instruction); i->di = b->dis++; - i->operation = END_OF_INSTRUCTIONS; + i->operation = BC_END_OF_INSTRUCTIONS; } + +#define bc_log(...) log_info(__VA_ARGS__) +#define BC_LOG 1 function void run_bytecode_interp(Bc *b){ for(;;){ auto instr = (Instruction *)b->registers[REG_INS_POINTER].pointer64; + bc_log("[%llx] - %s ", b->registers[REG_INS_POINTER].pointer64, op_name[instr->operation]); b->registers[REG_INS_POINTER].pointer += sizeof(Instruction); switch(instr->operation){ - case LOAD_FROM_MEMORY64:{ + + case BC_LOAD_FROM_MEMORY64:{ U64 *load_address = b->registers[instr->src].pointer64; b->registers[instr->dst].u64 = *load_address; }break; - case STORE_TO_MEMORY64:{ + + case BC_STORE_TO_MEMORY64:{ U64 *store_address = b->registers[instr->dst].pointer64; *store_address = b->registers[instr->src].u64; }break; - case PUSH_STACK:{ - U64 *stack = b->registers[REG_STACK_POINTER].pointer64; + + case BC_PUSH_STACK:{ + U64 *stack = b->registers[REG_STACK_POINTER].pointer64++; U64 src = b->registers[instr->src].u64; - *stack++ = src; + *stack = src; }break; - case POP_STACK:{ + + case BC_POP_STACK:{ U64 *stack = --b->registers[REG_STACK_POINTER].pointer64; b->registers[instr->dst].u64 = *stack; }break; - case END_OF_INSTRUCTIONS:{ + case BC_END_OF_INSTRUCTIONS:{ goto end_of_program; }break; - case LOAD_CONSTANT: { - b->registers[REG_INS_POINTER].pointer+=sizeof(Instruction); // Constant is twice the size of regular + case BC_LOAD_CONSTANT: { + b->registers[REG_INS_POINTER].pointer+=sizeof(Instruction); // Constant is twice the size of regular Instruction auto i = (Instruction_Constant *)instr; b->registers[i->dst] = i->constant; +#if BC_LOG + switch(i->debug_type_flag){ + case TYPE_S64: bc_log("%u %lld", i->dst, i->constant.s64); break; + case TYPE_U64: bc_log("%u %llu", i->dst, i->constant.u64); break; + case TYPE_F64: bc_log("%u %f" , i->dst, i->constant.f64); break; + invalid_default_case; + } +#endif }break; // // Generated using code_generating_script.py // - case INS_ADD_S64:{ + case BC_ADD_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld + %lld", left, right); b->registers[instr->dst].s64 = left + right; break; }break; - case INS_SUB_S64:{ + case BC_SUB_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld - %lld", left, right); b->registers[instr->dst].s64 = left - right; break; }break; - case INS_DIV_S64:{ + case BC_DIV_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld / %lld", left, right); b->registers[instr->dst].s64 = left / right; break; }break; - case INS_MUL_S64:{ + case BC_MUL_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld * %lld", left, right); b->registers[instr->dst].s64 = left * right; break; }break; - case INS_MOD_S64:{ + case BC_MOD_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld % %lld", left, right); b->registers[instr->dst].s64 = left % right; break; }break; - case INS_SHR_S64:{ + case BC_SHR_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld >> %lld", left, right); b->registers[instr->dst].s64 = left >> right; break; }break; - case INS_SHL_S64:{ + case BC_SHL_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld << %lld", left, right); b->registers[instr->dst].s64 = left << right; break; }break; - case INS_BITAND_S64:{ + case BC_BITAND_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld & %lld", left, right); b->registers[instr->dst].s64 = left & right; break; }break; - case INS_BITOR_S64:{ + case BC_BITOR_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld | %lld", left, right); b->registers[instr->dst].s64 = left | right; break; }break; - case INS_BITXOR_S64:{ + case BC_BITXOR_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld ^ %lld", left, right); b->registers[instr->dst].s64 = left ^ right; break; }break; - case INS_BITNOT_S64:{ + case BC_BITNOT_S64:{ S64 left = (S64)b->registers[instr->left].s64; S64 *dst = b->registers[instr->dst].pointer_s64; *dst = ~left; }break; - case INS_EQ_S64:{ + case BC_EQ_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld == %lld", left, right); b->registers[instr->dst].s64 = left == right; break; }break; - case INS_NEQ_S64:{ + case BC_NEQ_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld != %lld", left, right); b->registers[instr->dst].s64 = left != right; break; }break; - case INS_GT_S64:{ + case BC_GT_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld > %lld", left, right); b->registers[instr->dst].s64 = left > right; break; }break; - case INS_LT_S64:{ + case BC_LT_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld < %lld", left, right); b->registers[instr->dst].s64 = left < right; break; }break; - case INS_OR_S64:{ + case BC_OR_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld || %lld", left, right); b->registers[instr->dst].s64 = left || right; break; }break; - case INS_GTE_S64:{ + case BC_GTE_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld >= %lld", left, right); b->registers[instr->dst].s64 = left >= right; break; }break; - case INS_LTE_S64:{ + case BC_LTE_S64:{ S64 left = b->registers[instr->left].s64; S64 right = b->registers[instr->right].s64; + bc_log(" %lld <= %lld", left, right); b->registers[instr->dst].s64 = left <= right; break; }break; - case INS_ADD_U64:{ + case BC_ADD_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu + %llu", left, right); b->registers[instr->dst].u64 = left + right; break; }break; - case INS_SUB_U64:{ + case BC_SUB_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu - %llu", left, right); b->registers[instr->dst].u64 = left - right; break; }break; - case INS_DIV_U64:{ + case BC_DIV_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu / %llu", left, right); b->registers[instr->dst].u64 = left / right; break; }break; - case INS_MUL_U64:{ + case BC_MUL_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu * %llu", left, right); b->registers[instr->dst].u64 = left * right; break; }break; - case INS_MOD_U64:{ + case BC_MOD_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu % %llu", left, right); b->registers[instr->dst].u64 = left % right; break; }break; - case INS_SHR_U64:{ + case BC_SHR_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu >> %llu", left, right); b->registers[instr->dst].u64 = left >> right; break; }break; - case INS_SHL_U64:{ + case BC_SHL_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu << %llu", left, right); b->registers[instr->dst].u64 = left << right; break; }break; - case INS_BITAND_U64:{ + case BC_BITAND_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu & %llu", left, right); b->registers[instr->dst].u64 = left & right; break; }break; - case INS_BITOR_U64:{ + case BC_BITOR_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu | %llu", left, right); b->registers[instr->dst].u64 = left | right; break; }break; - case INS_BITXOR_U64:{ + case BC_BITXOR_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu ^ %llu", left, right); b->registers[instr->dst].u64 = left ^ right; break; }break; - case INS_BITNOT_U64:{ + case BC_BITNOT_U64:{ U64 left = (U64)b->registers[instr->left].u64; U64 *dst = b->registers[instr->dst].pointer_u64; *dst = ~left; }break; - case INS_EQ_U64:{ + case BC_EQ_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu == %llu", left, right); b->registers[instr->dst].u64 = left == right; break; }break; - case INS_NEQ_U64:{ + case BC_NEQ_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu != %llu", left, right); b->registers[instr->dst].u64 = left != right; break; }break; - case INS_GT_U64:{ + case BC_GT_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu > %llu", left, right); b->registers[instr->dst].u64 = left > right; break; }break; - case INS_LT_U64:{ + case BC_LT_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu < %llu", left, right); b->registers[instr->dst].u64 = left < right; break; }break; - case INS_OR_U64:{ + case BC_OR_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu || %llu", left, right); b->registers[instr->dst].u64 = left || right; break; }break; - case INS_GTE_U64:{ + case BC_GTE_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu >= %llu", left, right); b->registers[instr->dst].u64 = left >= right; break; }break; - case INS_LTE_U64:{ + case BC_LTE_U64:{ U64 left = b->registers[instr->left].u64; U64 right = b->registers[instr->right].u64; + bc_log(" %llu <= %llu", left, right); b->registers[instr->dst].u64 = left <= right; break; }break; - case INS_ADD_F64:{ + case BC_ADD_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f + %f", left, right); b->registers[instr->dst].f64 = left + right; break; }break; - case INS_SUB_F64:{ + case BC_SUB_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f - %f", left, right); b->registers[instr->dst].f64 = left - right; break; }break; - case INS_DIV_F64:{ + case BC_DIV_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f / %f", left, right); b->registers[instr->dst].f64 = left / right; break; }break; - case INS_MUL_F64:{ + case BC_MUL_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f * %f", left, right); b->registers[instr->dst].f64 = left * right; break; }break; - case INS_EQ_F64:{ + case BC_EQ_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f == %f", left, right); b->registers[instr->dst].f64 = left == right; break; }break; - case INS_NEQ_F64:{ + case BC_NEQ_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f != %f", left, right); b->registers[instr->dst].f64 = left != right; break; }break; - case INS_GT_F64:{ + case BC_GT_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f > %f", left, right); b->registers[instr->dst].f64 = left > right; break; }break; - case INS_LT_F64:{ + case BC_LT_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f < %f", left, right); b->registers[instr->dst].f64 = left < right; break; }break; - case INS_GTE_F64:{ + case BC_GTE_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f >= %f", left, right); b->registers[instr->dst].f64 = left >= right; break; }break; - case INS_LTE_F64:{ + case BC_LTE_F64:{ F64 left = b->registers[instr->left].f64; F64 right = b->registers[instr->right].f64; + bc_log(" %f <= %f", left, right); b->registers[instr->dst].f64 = left <= right; break; }break; @@ -542,6 +657,7 @@ run_bytecode_interp(Bc *b){ // } + bc_log("\n"); } end_of_program:; } @@ -551,7 +667,9 @@ test_interpreter(){ Bc b = create_bytecode_interp(); emit_load_constant_f64(&b, 2, 100.32); emit_load_constant_f64(&b, 3, 200.68); - emit_arithmetic(&b, INS_ADD_F64, 2, 3, 4); + emit_arithmetic(&b, BC_ADD_F64, 2, 3, 4); + emit_push(&b, 4); + emit_pop(&b, 5); emit_end(&b); run_bytecode_interp(&b); } diff --git a/code_generating_script.py b/code_generating_script.py index bd62fec..7c21cef 100644 --- a/code_generating_script.py +++ b/code_generating_script.py @@ -4,7 +4,9 @@ result = """ // """ +sizes = ["64", "32", "16", "8"] types = ["S64", "U64", "F64"] +print_sign = ["%lld", "%llu", "%f"] operations = [ ["+", "ADD"], ["-", "SUB"], ["/", "DIV"], ["*", "MUL"], ["%", "MOD"], [">>", "SHR"], ["<<", "SHL"], ["&", "BITAND"], ["|", "BITOR"], ["^", "BITXOR"], @@ -23,41 +25,70 @@ def should_skip(T, op): # Generate enum # if False: + enum_members = [] + enum_members.append("BC_END_OF_INSTRUCTIONS") + enum_members.append("BC_POP_STACK") + enum_members.append("BC_PUSH_STACK") + enum_members.append("BC_LOAD_CONSTANT") + + load_store = ["LOAD_FROM_MEMORY", "STORE_TO_MEMORY"] + for op in load_store: + for size in sizes: + enum_members.append(f"BC_{op}{size}") + for T in types: for _, op in operations: if should_skip(T, op): continue - result += f" INS_{op}_{T},\n" + enum_members.append(f"BC_{op}_{T}") result += "\n" + result += "enum Operation: U16{\n" + for i in enum_members: + result += f" {i},\n" + result += "};\n" + + result += "const char *op_name[] = {\n" + for i in enum_members: + result += f" \"{i}\",\n" + result += "};\n" + # # Generate switch cases # if True: - for T in types: + for sign, T in zip(print_sign, types): t = T.lower() + + # Generate arithmetic for symbol, op_name in operations: if should_skip(T, op_name): continue + + ################################### # Unary operator special case if symbol == "~": result += f""" - case INS_{op_name}_{T}:{{ + case BC_{op_name}_{T}:{{ {T} left = ({T})b->registers[instr->left].{t}; {T} *dst = b->registers[instr->dst].pointer_{t}; *dst = {symbol}left; }}break; """ continue - # Binary operation + ################################ + + ################################ + # Binary operation result += f""" - case INS_{op_name}_{T}:{{ + case BC_{op_name}_{T}:{{ {T} left = b->registers[instr->left].{t}; {T} right = b->registers[instr->right].{t}; + bc_log("{sign} {symbol} {sign}", left, right); b->registers[instr->dst].{t} = left {symbol} right; break; }}break; """ - + ################################ result += """ // diff --git a/main.cpp b/main.cpp index 4e390ad..e54b2c5 100644 --- a/main.cpp +++ b/main.cpp @@ -176,6 +176,7 @@ int main(int argument_count, char **arguments){ test_intern_table(); test_interpreter(); + __debugbreak(); exit(0); emit_line_directives = true;